More work on the unroller. Mainly comparison, shift and conditionals for AMD64. The code is pretty simple. It is for all practical purposes identical to the x86 versions. For example, the shift code looks something like this.
md_inst_ptr _md_amd64_shift(md_inst_ptr inst,
int opc,
int reg1,
int reg2)
{
if(reg2 == AMD64_RCX)
{
/* The shift value is already in ECX */
amd64_shift_reg_size(inst, opc, reg1, 4);
}
else if(reg1 == AMD64_RCX)
{
/* The value to be shifted is in ECX, so swap the order */
amd64_xchg_reg_reg(inst, reg1, reg2, 4);
amd64_shift_reg_size(inst, opc, reg2, 4);
amd64_mov_reg_reg(inst, reg1, reg2, 4);
}
else
{
/* Save ECX, perform the shift, and then restore ECX */
amd64_push_reg(inst, AMD64_RCX);
amd64_mov_reg_reg(inst, AMD64_RCX, reg2, 4);
amd64_shift_reg_size(inst, opc, reg1, 4);
amd64_pop_reg(inst, AMD64_RCX);
}
return inst;
}
Now, who can complain that I don't comment my code (like War2 did the last time I showed him some of my PPC JIT code). The reason the above code i so long is simply due to the fact that the shift instruction has RCX as the implied value to shift. Are there anybody here who didn't actually understand what the above code does to work around that ? :). Ok, so let's look at the PPC equivalent, shall we ?
#define md_shl_reg_reg_word_32(inst,reg1,reg2) \ ppc_alu_reg_sds((inst), PPC_SL, (reg1), (reg1), (reg2))
It is a single instruction - PPC_SL, which accepts 3 registers. Do you see how much cleaner PowerPC is in comparison to the implied argument shit in x86. And all registers are equal in PPC - so I can probably do R7 = R7 << R7 and have it work directly. I can imagine the amount of heartburn the guys who did the x86 optimizations went through. For now, I am one of them.
--If code is poetry, I write limericks.